The following Patent Literatures 1 to 3 disclose nitride semiconductor devices each having an active layer of a multi-quantum-well structure. In these nitride semiconductor devices, a barrier layer of the active layer contains n-type impurities. This is stated to make it possible to lower the lasing threshold and elongate the device life in the nitride semiconductor device of Patent Literature 1, reduce the forward voltage without deteriorating device characteristics in the nitride semiconductor device of Patent Literature 2, and improve the reverse voltage resistance in the nitride semiconductor device of Patent Literature 3.
The following Patent Literature 4 discloses a method for manufacturing a light-emitting semiconductor device including a group III nitride light-emitting layer. For reducing the magnitude of piezoelectric fields, in this method, the above-mentioned group III nitride light-emitting layer and the like is grown on a substrate in which a semipolar surface tilted from a c-plane is used as a main surface.